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2-layer CSPIC substrate


This is a two-layer CSP test board—comprising both a load board and a burn-in board—specifically designed for chip‑level packages such as CSP, WLCSP, and µBGA. It is primarily used in the semiconductor packaging and testing process, serving downstream markets including consumer electronics, automotive electronics, telecommunications, sensors, and storage.

Category:

IC Substrate

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  • Product Description
  • Application areas
  • Number of floors 2nd floor
    Plate thickness 0.25mm
    Materials BT/ABF
    Surface treatment Nickel-Palladium-Gold 2u
    Minimum hole size 0.15mm
    Copper thickness, inner and outer layers Hoz
    Line width/line spacing 2mil/2mil
    Solder mask/characters Green oil/white text
    Special process Resin plug sealing, electroplating leveling, and back-side finishing processes

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