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4-layer CSPIC substrate


This is a 4‑layer CSP test board (**Load Board + Burn‑in Board**), specifically designed for chip‑level packages such as CSP, WLCSP, and µBGA. It is primarily used in the semiconductor packaging and testing process, serving downstream markets including consumer electronics, automotive electronics, communications, sensors, and storage.

Category:

IC Substrate

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  • Product Description
  • Application areas
  • Number of floors 4 floors
    Plate thickness 0.35mm
    Materials BT/ABF
    Surface treatment 2u immersion gold
    Minimum hole size 0.15mm
    Copper thickness, inner and outer layers Hoz/1oz
    Line width/line spacing 3mil/3mil
    Solder mask/characters Green oil/white text
    Special process Resin plug sealing, electroplating leveling, and back-side finishing processes

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